Description

An industry-favorite 180-day course specifically for “Front-end” VLSI (RTL design and verification). It is well-regarded for its placement assistance with companies like Intel and Qualcomm.

• Analog Design: Current mirrors, Op-Amps, and voltage references.

• Digital Design: FSMs (Finite State Machines), RTL coding using Verilog/SystemVerilog.

• Physical Design: Floorplanning, Placement, Routing, and GDSII generation.

• Verification: UVM (Universal Verification Methodology) and DFT (Design for Testability).